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EMC2104 Fiches technique(PDF) 81 Page - SMSC Corporation |
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EMC2104 Fiches technique(HTML) 81 Page - SMSC Corporation |
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81 / 101 page ![]() Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown Datasheet SMSC EMC2104 81 Revision 1.74 (05-08-08) DATASHEET 6.39 GPIO Output Register The GPIO Output Register controls the state of the corresponding GPIO pins when they areconfigured as GPIOs and as outputs. If the output is configured as an open-drain output, then it requires a pull-up resistor to VDD. Setting the corresponding bit to a ‘1’ will act to disable the output allowing the pull-up resistor to pull the output high. Setting the corresponding bit to a ‘0’ will enable the output and drive the pin to a logical ‘0’ state. If the output is configured as a push-pull output, then output pin will immediately be driven to match the corresponding bit setting. 6.40 GPIO Interrupt Enable Register The GPIO Interrupt Enable Register enables the GPIOs to assert the ALERT pin when they change state. When the GPIO pins are disabled or configured as outputs, then these bits are ignored. Bit 3 - 0 - GPIOx_INT_EN - Allows the ALERT# pin to be asserted when the GPIOx pin changes state (when configured as an input). ‘0’ (default) - The ALERT# pin will not be asserted when the GPIOx pin changes state (when configured as an input). ‘1’ - The ALERT# pin will be asserted when the GPIOxpin changes state (when configured as an input). 6.41 GPIO Status Register The GPIO Status Register indicates which GPIO has changed states to cause the ALERT pins to be asserted. This register is cleared when it is read. The bits in this register are set whenever the corresponding GPIO changes states regardless if the ALERT pins are asserted. Once a bit is set, it will remain set until read. Table 6.56 GPIO Output Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT E4h R/W GPIO Output 1 -- - - - GPIO3 _OUT GPIO2 _OUT GPIO1 _OUT 00h Table 6.57 GPIO Interrupt Enable Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT E5h R/W GPIO Interrupt Enable -- - - - GPIO3_ INT_EN GPIO2_ INT_EN GPIO1_ INT_EN 00h Table 6.58 GPIO Status Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT E6h R-C GPIO Status -- - - - GPIO3_ STS GPIO2_ STS GPIO1_ STS 00h |
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