EMC2104 datasheet(72/101 Pages) SMSC

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Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown

Datasheet

Revision 1.74 (05-08-08)

SMSC EMC2104

DATASHEET

6.27

Fan Minimum Drive Registers

The Fan Minimum Drive Register stores the minimum drive setting for each RPM based Fan Speed

Control Algorithm. The RPM based Fan Speed Control Algorithm will not drive the fan at a level lower

than the minimum drive unless the target Fan Speed is set at FFh (see Section 6.30)

During normal operation, if the fan stops for any reason (including low drive), the RPM based Fan

Speed Control Algorithm will attempt to restart the fan. Setting the Fan Minimum Drive Registers to a

setting that will maintain fan operation is a useful way to avoid potential fan oscillations as the control

circuitry attempts to drive it at a level that cannot support fan operation.

The Fan Minimum Drive Register is software locked.

6.28

Valid TACH Count Registers

The Valid TACH Count Register stores the maximum TACH Reading Register value to indicate that

the each fan is spinning properly. The value is referenced at the end of the Spin Up Routine to

determine if the fan has started operating and decide if the device needs to retry. See Equation [3] for

translating the count to an RPM. This register is only used when the FSC is active.

If the TACH Reading Register value exceeds the Valid TACH Count Register (indicating that the Fan

RPM is below the threshold set by this count), then a stalled fan is detected. In this condition, the

algorithm will automatically begin its Spin Up Routine.

If a TACH Target setting is set above the Valid TACH Count setting, then that setting will be ignored

and the algorithm will use the current fan drive setting.

The Valid TACH Count Register is software locked.

Table 6.42 Minimum Fan Drive Registers

ADDR

R/W

B7B6B5

B2B1B0

DEFAULT

48h

R/W

Fan 1

Minimum

Drive

128

643216

66h

(40%)

88h

R/W

Fan 2

Minimum

Drive

128

643216

66h

(40%)

Table 6.43 Valid TACH Count Registers

ADDR

R/W

B7B6

B4B3B2

B1B0

DEFAULT

49h

R/W

Valid TACH

Count 1

4096

2048

1024

512

256

128

F5h

89h

R/W

Valid TACH

Count 2

4096

2048

1024

512

256

128

F5h

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