EMC2104 datasheet(79/101 Pages) SMSC

79 / 101 page

Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown

Datasheet

SMSC EMC2104

Revision 1.74 (05-08-08)

DATASHEET

The Look Up Table 2 Registers hold the 40 entries of the Look Up Table that controls the drive of Fan

2. As the temperature (or voltage) channels are updated, the measured temperature for each channel

is compared against the respective entries in the Look Up Table and the associated drive setting is

loaded into an internal shadow register and stored.

6.35

Muxed Pin Configuration Register

The Muxed Pin Configuration Register controls the pin function for all of the multiple function GPIO

pins.

Bit 2 - GPIO3_CFG - Determines the pin function for the PWM2 / GPIO3 pin as well as the DAC2 pin.

‘0’ (default) - The PWM2/ GPIO3 pin functions as a PWM output for the 2nd the RPM based Fan

Speed Control Algorithm (FSC).

‘1’ - The PWM2 / GPIO3 pin functions as a GPIO. The 2nd RPM based Fan Speed Control

Algorithm will be disabled. All PWM2 controls will be ignored though are still writable via the

SMBus.

Bit 1 - GPIO2_CFG - Determines the pin functions for the TACH2 / GPIO2 pin.

‘0’ (default) - The TACH2 / GPIO2 pin functions as a tachometer input for the 2nd the RPM based

Fan Speed Control Algorithm (FSC).

‘1’ - The TACH2 / GPIO2 pin functions as a GPIO. When set, the EN_ALGO2 bit will automatically

be set to ‘0’ and cannot be set.

Bit 0 - GPIO1_CFG - Determines the pin function for the CLK_IN / GPIO1 pin.

‘0’ - The CLK_IN / GPIO1 pin functions as a clock input for the RPM based Fan Speed Control

Algorithm (FSC).

‘1’ (default) - The CLK_IN / GPIO1 pin functions as a GPIO.

B6h

R/W

LUT 2 Ext

Diode 2

Setting 8

7Fh

(127°C)

LUT2 VIN2

Setting 8

752.9

376.5

188.2

94.12

47.06

23.53

11.76

5.88

7Fh

(0.4V)

B7h

R/W

LUT 2 Temp

3 Setting 8

7Fh

(127°C)

LUT2 Voltage

3 Setting 8

752.9

376.5

188.2

94.12

47.06

23.53

11.76

5.88

7Fh

(0.4V)

B8h

R/W

LUT2 Temp 4

Setting 8

7Fh

(127°C)

B9h

R/W

LUT 2 Temp

Hysteresis

0Ah

Table 6.52 Muxed Pin Configuration Register

ADDR

R/W

DEFAULT

E0h

R/W

Muxed Pin

Config

GPIO3

_CFG

GPIO2

_CFG

GPIO1

_CFG

01h

Table 6.51 Look Up Table2 Registers (continued)

ADDR

R/W

TACH /

DRIVE

B7B6

B5B4B3B2B1B0

DEFAULT

EMC2104 Fiches technique(PDF) 79 Page - SMSC Corporation

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