EMC2104 datasheet(71/101 Pages) SMSC

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Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown

Datasheet

SMSC EMC2104

Revision 1.74 (05-08-08)

DATASHEET

6.26

Fan Step Registers

The Fan Step Registers, along with the Update Time, controls the ramp rate of the fan driver response

calculated by the RPM based Fan Speed Control Algorithm. The value of the registers represents the

maximum step size each fan driver will take between update times (see Section 6.22).

When the FSC algorithm is enabled, Ramp Rate control is automatically used. When the FSC is not

active, then Ramp Rate control can be enabled by asserting the EN_RRC bit (see Section 6.23)

APPLICATION NOTE: The UPDATE bits and Fan Step Register settings operate independently of the RPM based

Fan Speed Control Algorithm and will always limit the fan drive setting. That is, if the

programmed fan drive setting (either in determined by the RPM based Fan Speed Control

Algorithm, the Look Up Table, or by manual settings) exceeds the current fan drive setting

by greater than the Fan Step Register setting, the EMC2104 will limit the fan drive change

to the value of the Fan Step Register. It will use the Update Time to determine how often to

update the drive settings.

APPLICATION NOTE: If the Fan Speed Control Algorithm is used, the default settings in the Fan Configuration 2

The Fan Step Registers are software locked.

Table 6.40 Spin Time

SPINUP_TIME[1:0]

TOTAL SPIN UP TIME

250 ms

500 ms (default)

1 sec

2 sec

Table 6.41 Fan Step Registers

ADDR

R/W

DEFAULT

47h

R/W

Fan 1 Max

Step

10h

87h

R/W

Fan 2 Max

Step

10h

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