EMC2104 datasheet(62/101 Pages) SMSC

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Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown

Datasheet

Revision 1.74 (05-08-08)

SMSC EMC2104

DATASHEET

‘1’ - the FAN_STALL 2 or DRIVE_FAIL2 bits will assert the ALERT# pin if set.

Bit 1 - SPIN_INT_EN1 - Allows the FAN_SPIN1 bit to assert the ALERT# pin.

‘0’ (default) - the FAN_SPIN1 bit will not assert the ALERT# pin though it will still update the Status

‘1’ - the FAN_SPIN1 bit will assert the ALERT# pin.

Bit 0 - STALL_INT_EN1 - Allows the FAN_STALL1 bit or DRIVE_FAIL1 bit to assert the ALERT# pin.

‘0’ (default) - the FAN_STALL1 bit or DRIVE_FAIL1 bit will not assert the ALERT# pin though will

still update the Status Register normally.

‘1’ - the FAN_STALL1 or DRIVE_FAIL1 bit will assert the ALERT# pin if set.

6.17

PWM Configuration Register

The PWM Config Register controls the output type and polarity of all PWM outputs.

Bit 1 - POLARITY2 - Determines the polarity of PWM2 (if enabled).

Bit 0 - POLARITY1 - Determines the polarity of PWM1 (if enabled).

6.18

PWM Base Frequency Register

The PWM Base Frequency Register determines the base frequency that is used with the PWM Divide

the PWM Divide Register.

Bits 3-2 - PWM_BASE2[1:0] - Determines the base frequency of the PWM2 driver (PWM2 / GPIO4

pin).

Bits 1-0 - PWM_BASE1[1:0] - Determines the base frequency of the PWM1 driver (PWM1).

Table 6.22 PWM Configuration Register

ADDR

R/W

B5B4B3B2B1B0

DEFAULT

2Ah

R/W

PWM

Config

----

POLA

RITY2

POLA

RITY1

00h

Table 6.23 PWM Base Frequency Register

ADDR

R/W

B5B4B3B2B1B0

DEFAULT

2Bh

R/W

PWM Base

Frequency

PWM_

BASE

2_1

PWM_

BASE

2_0

PWM_

BASE

1_1

PWM_

BASE

1_0

FFh

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