EMC2104 datasheet(65/101 Pages) SMSC

65 / 101 page

Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown

Datasheet

SMSC EMC2104

Revision 1.74 (05-08-08)

DATASHEET

The PWM 1 and 2 Divide Registers determine the final frequency of the PWM 1and PWM 2 drivers.

Each driver base frequency is divided by the value of the respective PWM Divide Register to determine

the final frequency. The duty cycle settings are not affected by these settings, only the final frequency

of the PWM driver. A value of 00h will be decoded as 01h.

6.22

Fan Configuration 1 Registers

The Fan Configuration 1 Register controls the general operation of the RPM based Fan Speed Control

Algorithm used for the Fan 1 driver.

Bit 7 - EN_ALGO - enables the RPM based Fan Speed Control Algorithm. This bit is set and cleared

automatically when the LUT_LOCK bit is set based on the setting of the TACH / DRIVE bit (see

Section 6.32). When the LUT_LOCK bit is cleared, then setting this bit will enable the FSC without

using the Look Up Table.

‘0’ - (default) the control circuitry is disabled and the fan driver output is determined by the Fan

Driver Setting Register.

‘1’ - the control circuitry is enabled and the Fan Driver output will be automatically updated to

maintain the programmed fan speed as indicated by the TACH Target Register.

Bits 6- 5 - RANGE[1:0] - Adjusts the range of reported and programmed tachometer reading values.

The RANGE bits determine the weighting of all TACH values (including the Valid TACH Count, TACH

Target, and TACH reading) as shown in Table 6.29.

Bits 4-3 - EDGES[1:0] - determines the minimum number of edges that must be detected on the

TACHx signal to determine a single rotation. A typical fan measured 5 edges (for a 2-pole fan). For

more accurate tachometer measurement, the minimum number of edges measured may be increased.

Increasing the number of edges measured with respect to the number of poles of the fan will cause

the TACH Reading registers to indicate a fan speed that is higher or lower than the actual speed. In

order for the FSC Algorithm to operate correctly, the TACH Target must be updated by the user to

accommodate this shift. The Effective Tach Multiplier shown in Table 6.30 is used as a direct multiplier

Table 6.28 Fan Configuration 1 Registers

ADDR

R/W

DEFAULT

42h

R/W

Fan 1

Configuration

EN_

ALGO

RANGE[1:0]

EDGES[1:0]

UPDATE[2:0]

2Bh

82h

R/W

Fan 2

Configuration

EN_

ALGO

RANGE[1:0]

EDGES[1:0]

UPDATE[2:0]

2Bh

Table 6.29 Range Decode

RANGE[1:0]

REPORTED MINIMUM

RPM

TACH COUNT

MULTIPLIER

500

1000 (default)

2000

4000

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