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PIC16F18345 Fiches technique(PDF) 16 Page - Microchip Technology

No de pièce PIC16F18345
Description  Full-Featured, Low Pin Count Microcontrollers with XLP
PDF  442 Pages
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Fabricant  MICROCHIP [Microchip Technology]
Site Internet  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F18345 Fiches technique(HTML) 16 Page - Microchip Technology

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PIC16(L)F18313/18323
DS40001799A-page 16
Preliminary
 2015 Microchip Technology Inc.
2.0
ENHANCED MID-RANGE CPU
This family of devices contains an enhanced mid-range
8-bit CPU core. The CPU has 49 instructions. Interrupt
capability includes automatic context saving. The
hardware stack is 16-levels deep and has Overflow and
Underflow Reset capability. Direct, Indirect, and
Relative addressing modes are available. Two File
Select Registers (FSRs) provide the ability to read
program and data memory.
• Automatic Interrupt Context Saving
• 16-level Stack with Overflow and Underflow
• File Select Registers
• Instruction Set
FIGURE 2-1:
CORE BLOCK DIAGRAM
Data Bus
8
14
Program
Bus
Instruction reg
Program Counter
8 Level Stack
(13-bit)
Direct Addr 7
12
Addr MUX
FSR reg
STATUS reg
MUX
ALU
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
VDD
8
8
Brown-out
Reset
12
3
VSS
Internal
Oscillator
Block
Data Bus
8
14
Program
Bus
Instruction reg
Program Counter
8 Level Stack
(13-bit)
Direct Addr 7
Addr MUX
FSR reg
STATUS reg
MUX
ALU
W reg
Instruction
Decode &
Control
Timing
Generation
VDD
8
8
3
VSS
Internal
Oscillator
Block
15
Data Bus
8
14
Program
Bus
Instruction Reg
Program Counter
16-Level Stack
(15-bit)
Direct Addr 7
RAM Addr
Addr MUX
Indirect
Addr
FSR0 Reg
STATUS Reg
MUX
ALU
Instruction
Decode and
Control
Timing
Generation
VDD
8
8
3
VSS
Internal
Oscillator
Block
RAM
FSR reg
FSR reg
FSR1 Reg
15
15
15
Program Memory
Read (PMR)
12
FSR reg
FSR reg
BSR Reg
5
Configuration
Configuration
Configuration
Nonvolatile
Memory



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