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PIC16F18345 Fiches technique(PDF) 62 Page - Microchip Technology |
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PIC16F18345 Fiches technique(HTML) 62 Page - Microchip Technology |
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62 / 442 page ![]() PIC16(L)F18313/18323 DS40001799A-page 62 Preliminary 2015 Microchip Technology Inc. 5.12 Power Control (PCON) Register The Power Control (PCON) register contains flag bits to differentiate between a: • Power-on Reset (POR) • Brown-out Reset (BOR) • RESET Instruction Reset (RI) •MCLR Reset (RMCLR) • Watchdog Timer Reset (RWDT) • Stack Underflow Reset (STKUNF) • Stack Overflow Reset (STKOVF) The PCON0 register bits are shown in Register 5-2. Hardware will change the corresponding register bit during the reset process; if the Reset was not caused by the condition, the bit remains unchanged (Table 5-4). Software should reset the bit to the inactive state after the restart (hardware will not reset the bit). Software may also set any PCON bit to the active state, so that user code may be tested, but no reset action will be generated. REGISTER 5-1: BORCON: BROWN-OUT RESET CONTROL REGISTER R/W-1/u R/W-0/0 U-0 U-0 U-0 U-0 U-0 R-q/u SBOREN(1) Reserved — — — — —BORRDY bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared q = Value depends on condition bit 7 SBOREN: Software Brown-out Reset Enable bit(1) If BOREN <1:0> in Configuration Words 01: SBOREN is read/write, but has no effect on the BOR. If BOREN <1:0> in Configuration Words = 01: 1 = BOR Enabled 0 = BOR Disabled bit 6 Reserved. bit 5-1 Unimplemented: Read as ‘0’’. bit 0 BORRDY: Brown-out Reset Circuit Ready Status bit 1 = The Brown-out Reset circuit is active 0 = The Brown-out Reset circuit is inactive Note 1: BOREN<1:0> bits are located in Configuration Words. |
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