PIC16F18345 datasheet(75/442 Pages) MICROCHIP

75 / 442 page

 2015 Microchip Technology Inc.

Preliminary

DS40001799A-page 75

PIC16(L)F18313/18323

6.5

OSCCON1: OSCILLATOR CONTROL REGISTER1

U-0

R/W-f/f(1)

R/W-q/q

—

NOSC<2:0>(2,3)

NDIV<3:0>(2,3,4)

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

f = determined by fuse setting

bit 7

Unimplemented:

Read as ‘0’

bit 6-4

NOSC<2:0>:

New Oscillator Source Request bits

The setting requests a source oscillator and PLL combination per Table 6-1.

POR value = RSTOSC (Register 4-1).

bit 3-0

NDIV<3:0>:

New Divider Selection Request bits

The setting determines the new postscaler division ratio per Table 6-2.

Note 1:

The default value (f/f) is set equal to the RSTOSC Configuration bits.

If NOSC is written with a reserved value (Table 6-1), the HFINTOSC will be automatically selected as the clock source.

When CSWEN = 0, this register is read-only and cannot be changed from the POR value.

When RSTOSC = 110 (HFINTOSC 1 MHz), the NDIV bits will default to ‘0010’ upon Reset; for all other NOSC settings

the NDIV bits will default to ‘0000’ upon Reset.

OSCCON2: OSCILLATOR CONTROL REGISTER 2

U-0

R-q/q(1)

—

COSC<2:0>

CDIV<3:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

Unimplemented:

Read as ‘0’

bit 6-4

COSC<2:0>:

Current Oscillator Source Select bits (read-only)

Indicates the current source oscillator and PLL combination per Table 6-1.

bit 3-0

CDIV<3:0>:

Current Divider Select bits (read-only)

Indicates the current postscaler division ratio per Table 6-2.

Note

The Reset value (n/n) will match the NOSC<2:0>/NDIV<3:0> bits.

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