PIC16F18345 datasheet(91/442 Pages) MICROCHIP

91 / 442 page

 2015 Microchip Technology Inc.

Preliminary

DS40001799A-page 91

PIC16(L)F18313/18323

PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3

R/W-0/0

U-0

R/W-0/0

OSFIE

CSWIE

—

CLC2IE

CLC1IE

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

OSFIE

: Oscillator Fail Interrupt Enable bit

= Enables the Oscillator Fail interrupt

= Disables the Oscillator Fail interrupt

bit 6

CSWIE:

Clock Switch Complete Interrupt Enable bit

= The clock switch module interrupt is enabled

= The clock switch module interrupt is not enabled

bit 5-2

Unimplemented

: Read as ‘0’

bit 1

CLC2IE:

CLC2 Interrupt Enable bit

= CLC2 interrupt enabled

= CLC2 interrupt disabled

bit 0

CLC1IE:

CLC1 Interrupt Enable bit

= CLC1 interrupt enabled

= CLC1 interrupt disabled

Note:

Bit PEIE of the INTCON register must be

set to enable any peripheral interrupt.

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