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PIC16F18345 Fiches technique(PDF) 52 Page - Microchip Technology |
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PIC16F18345 Fiches technique(HTML) 52 Page - Microchip Technology |
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52 / 442 page ![]() PIC16(L)F18313/18323 DS40001799A-page 52 Preliminary 2015 Microchip Technology Inc. REGISTER 4-3: CONFIGURATION WORD 3: MEMORY R/P-1 U-1 U-1 U-1 U-1 U-1 LVP(1) — — — — — bit 13 bit 8 U-1 U-1 U-1 U-1 U-1 U-1 R/P-1 R/P-1 — — — — — — WRT1 WRT0 bit 7 bit 0 Legend: R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘1’ ‘0’ = Bit is cleared ‘1’ = Bit is set n = Value when blank or after Bulk Erase bit 13 LVP: Low-Voltage Programming Enable bit 1 = ON Low-Voltage Programming is enabled. MCLR/VPP pin function is MCLR. MCLRE Configuration bit is ignored. 0 = OFF HV on MCLR/VPP must be used for programming. bit 12-2 Unimplemented: Read as ‘1’ bit 1-0 WRT<1:0>: User NVM Self-Write Protection bits 11 = OFF Write protection off 10 = BOOT 0000h to 01FFh write-protected, 0200h to 07FFh may be modified 01 = HALF 0000h to 03FFh write-protected, 0400h to 07FFh may be modified 00 = ALL 0000h to 07FFh write-protected, no addresses may be modified WRT applies only to the self-write feature of the device; writing through ICSP™ is never protected. Note 1: The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP. |
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