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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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PIC16F18345 Fiches technique(PDF) 40 Page - Microchip Technology |
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PIC16F18345 Fiches technique(HTML) 40 Page - Microchip Technology |
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40 / 442 page  Bank 30 CPU CORE REGISTERS; see Table 3-2 for specifics F0Ch — — Unimplemented — — F0Dh — — Unimplemented — — F0Eh — — Unimplemented — — F0Fh CLCDATA — — — — — — MLC2OUT MLC1OUT ---- --00 ---- --00 F10h CLC1CON LC1EN — LC1OUT LC1INPT LC1INTN LC1MODE<2:0> 0-00 0000 0-00 0000 F11h CLC1POL LC1POL — — — LC1G4POL LC1G3POL LC1G2POL LC1G1POL 0--- xxxx 0--- uuuu F12h CLC1SEL0 — — — LC1D1S<4:0> ---x xxxx ---u uuuu F13h CLC1SEL1 — — — LC1D2S<4:0> ---x xxxx ---u uuuu F14h CLC1SEL2 — — — LC1D3S<4:0> ---x xxxx ---u uuuu F15h CLC1SEL3 — — — LC1D4S<4:0> ---x xxxx ---u uuuu F16h CLC1GLS0 LC1G1D4T LC1G1D4N LC1G1D3T LC1G1D3N LC1G1D2T LC1G1D2N LC1G1D1T LC1G1D1N xxxx xxxx uuuu uuuu F17h CLC1GLS1 LC1G2D4T LC1G2D4N LC1G2D3T LC1G2D3N LC1G2D2T LC1G2D2N LC1G2D1T LC1G2D1N xxxx xxxx uuuu uuuu F18h CLC1GLS2 LC1G3D4T LC1G3D4N LC1G3D3T LC1G3D3N LC1G3D2T LC1G3D2N LC1G3D1T LC1G3D1N xxxx xxxx uuuu uuuu F19h CLC1GLS3 LC1G4D4T LC1G4D4N LC1G4D3T LC1G4D3N LC1G4D2T LC1G4D2N LC1G4D1T LC1G4D1N xxxx xxxx uuuu uuuu F1Ah CLC2CON LC2EN — LC2OUT LC2INPT LC2INTN LC2MODE<2:0> 0-00 0000 0-00 0000 F1Bh CLC2POL LC2POL — — — LC2G4POL LC2G3POL LC2G2POL LC2G1POL 0--- xxxx 0--- uuuu F1Ch CLC2SEL0 — — — LC2D1S<4:0> ---x xxxx ---u uuuu F1Dh CLC2SEL1 — — — LC2D2S<4:0> ---x xxxx ---u uuuu F1Eh CLC2SEL2 — — — LC2D3S<4:0> ---x xxxx ---u uuuu F1Fh CLC2SEL3 — — — LC2D4S<4:0> ---x xxxx ---u uuuu F20h CLC2GLS0 LC2G1D4T LC2G1D4N LC2G1D3T LC2G1D3N LC2G1D2T LC2G1D2N LC2G1D1T LC2G1D1N xxxx xxxx uuuu uuuu F21h CLC2GLS1 LC2G2D4T LC2G2D4N LC2G2D3T LC2G2D3N LC2G2D2T LC2G2D2N LC2G2D1T LC2G2D1N xxxx xxxx uuuu uuuu F22h CLC2GLS2 LC2G3D4T LC2G3D4N LC2G3D3T LC2G3D3N LC2G3D2T LC2G3D2N LC2G3D1T LC2G3D1N xxxx xxxx uuuu uuuu F23h CLC2GLS3 LC2G4D4T LC2G4D4N LC2G4D3T LC2G4D3N LC2G4D2T LC2G4D2N LC2G4D1T LC2G4D1N xxxx xxxx uuuu uuuu TABLE 3-4: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’. Note 1: Only on PIC16F18313/18323. |
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