PIC16F18345 datasheet(20/442 Pages) MICROCHIP

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PIC16(L)F18313/18323

DS40001799A-page 20

Preliminary

 2015 Microchip Technology Inc.

3.1.1.2

Indirect Read with FSR

The program memory can be accessed as data by

setting bit 7 of the FSRxH register and reading the

matching INDFx register. The MOVIW instruction will

place the lower eight bits of the addressed word in the

W register. Writes to the program memory cannot be

performed via the INDF registers. Instructions that

access the program memory via the FSR require one

extra instruction cycle to complete. Example 3-2 shows

how to access the program memory via an FSR.

The HIGH directive will set bit 7 if a label points to a

location in the program memory.

EXAMPLE 3-2:

ACCESSING PROGRAM

MEMORY VIA FSR

3.2

Data Memory Organization

The data memory is partitioned into 32 memory banks

with 128 bytes in each bank. Each bank consists of

(Figure 3-2):

• 12 core registers

• 20 Special Function Registers (SFR)

• Up to 80 bytes of General Purpose RAM (GPR)

• 16 bytes of common RAM

The active bank is selected by writing the bank number

into the Bank Select Register (BSR). Unimplemented

memory will read as ‘0’. All data memory can be

accessed either directly (via instructions that use the

file registers) or indirectly via the two File Select

Registers

(FSR).

See

Section 3.5

“Indirect

Addressing””

for more information.

Data memory uses a 12-bit address. The upper seven

bits of the address define the Bank address and the

lower five bits select the registers/RAM in that bank.

3.2.1

CORE REGISTERS

The core registers contain the registers that directly

affect the basic operation. The core registers occupy

the first 12 addresses of every data memory bank

(addresses x00h/x80h through x0Bh/x8Bh). These

registers are listed below in Table 3-2. For detailed

information, see Table 3-4.

FIGURE 3-2:

BANKED MEMORY

PARTITIONING

TABLE 3-2:

CORE REGISTERS

constants

RETLW DATA0

;Index0 data

RETLW DATA1

;Index1 data

RETLW DATA2

RETLW DATA3

my_function

;… LOTS OF CODE…

MOVLW

LOW constants

MOVWF

FSR1L

MOVLW

HIGH constants

MOVWF

FSR1H

MOVIW

0[FSR1]

;THE PROGRAM MEMORY IS IN W

0Bh

0Ch

1Fh

20h

6Fh

70h

7Fh

00h

Common RAM

(16 bytes)

General Purpose RAM

(80 bytes maximum)

Core Registers

(12 bytes)

Special Function Registers

Memory Region

7-bit Bank Offset

Addresses

BANKx

x00h or x80h

INDF0

x01h or x81h

INDF1

x02h or x82h

PCL

x03h or x83h

STATUS

x04h or x84h

FSR0L

x05h or x85h

FSR0H

x06h or x86h

FSR1L

x07h or x87h

FSR1H

x08h or x88h

BSR

x09h or x89h

WREG

x0Ah or x8Ah

PCLATH

x0Bh or x8Bh

INTCON

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