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PIC16F18345 Fiches technique(PDF) 58 Page - Microchip Technology |
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PIC16F18345 Fiches technique(HTML) 58 Page - Microchip Technology |
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58 / 442 page ![]() PIC16(L)F18313/18323 DS40001799A-page 58 Preliminary 2015 Microchip Technology Inc. 5.2.1 BOR IS ALWAYS ON When the BOREN bits of Configuration Words are programmed to ‘11’, the BOR is always on. The device start-up will be delayed until the BOR is ready and VDD is higher than the BOR threshold. BOR protection is active during Sleep. The BOR does not delay wake-up from Sleep. 5.2.2 BOR IS OFF IN SLEEP When the BOREN bits of Configuration Words are programmed to ‘10’, the BOR is on, except in Sleep. The device start-up will be delayed until the BOR is ready and VDD is higher than the BOR threshold. BOR protection is not active during Sleep, but device wake-up will be delayed until the BOR can determine that the VDD is higher than the BOR threshold. The device wake-up will be delayed until the BOR is ready. 5.2.3 BOR CONTROLLED BY SOFTWARE When the BOREN bits of Configuration Words are programmed to ‘01’, the BOR is controlled by the SBOREN bit of the BORCON register. The device wake from Sleep is not delayed by the BOR ready con- dition or the VDD level. BOR protection begins as soon as the BOR circuit is ready. The status of the BOR circuit is reflected in the BORRDY bit of the BORCON register. BOR protection is unchanged by Sleep. 5.2.4 BOR ALWAYS OFF When the BOREN bits of Configuration Word 2 are programmed to '00', the BOR is always disabled. In this configuration, setting the SBOREN bit will have no effect on the BOR operation. FIGURE 5-2: BROWN-OUT SITUATIONS TPWRT(1) VBOR VDD Internal Reset VBOR VDD Internal Reset TPWRT(1) < TPWRT TPWRT(1) VBOR VDD Internal Reset Note 1: TPWRT delay only if PWRTE bit is programmed to ‘0’. |
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