SH7205 datasheet(23/1904 Pages) RENESAS

23 / 1904 page

Rev. 1.00 Mar. 25, 2008 Page xxiii of xxxii

19.4.3 Operation Modes................................................................................................... 918

19.4.4 Transmit Operation ............................................................................................... 919

19.4.5 Receive Operation................................................................................................. 922

19.4.6 Serial Bit Clock Control........................................................................................ 925

19.5

Usage Notes ....................................................................................................................... 926

19.5.1 Limitations from Overflow during Receive DMA Operation............................... 926

19.5.2 Note on Using Oversampling Clock ..................................................................... 926

Section 20 Controller Area Network (RCAN-TL1) ..........................................927

20.1

Summary............................................................................................................................ 927

20.1.1 Overview............................................................................................................... 927

20.1.2 Scope..................................................................................................................... 927

20.1.3 Audience ............................................................................................................... 927

20.1.4 References............................................................................................................. 927

20.1.5 Features................................................................................................................. 928

20.2

Architecture ....................................................................................................................... 929

20.3

Programming Model

Overview....................................................................................... 932

20.3.1 Memory Map ........................................................................................................ 932

20.3.2 Mailbox Structure ................................................................................................. 934

20.3.3 RCAN-TL1 Control Registers .............................................................................. 951

20.3.4 RCAN-TL1 Mailbox Registers............................................................................. 972

20.3.5 Timer Registers..................................................................................................... 987

20.4

Application Note.............................................................................................................. 1001

20.4.1 Test Mode Settings ............................................................................................. 1001

20.4.2 Configuration of RCAN-TL1 ............................................................................. 1003

20.4.3 Message Transmission Sequence........................................................................ 1008

20.4.4 Message Receive Sequence ................................................................................ 1022

20.4.5 Reconfiguration of Mailbox................................................................................ 1024

20.5

Interrupt Sources.............................................................................................................. 1026

20.6

DMAC Interface .............................................................................................................. 1027

20.7

CAN Bus Interface........................................................................................................... 1028

20.8

Setting I/O Ports for RCAN-TL1..................................................................................... 1029

20.9

Usage Notes ..................................................................................................................... 1031

20.9.1 Notes on Port Setting for Multiple Channels Used as Single Channel ............... 1031

Section 21 A/D Converter (ADC)....................................................................1033

21.1

Features............................................................................................................................ 1033

21.2

Input/Output Pins ............................................................................................................. 1035

21.3

Register Descriptions ....................................................................................................... 1036

21.3.1 A/D Data Registers A to H (ADDRA to ADDRH) ............................................ 1037

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