| Moteur de recherche de fiches techniques de composants électroniques |
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SH7205 Fiches technique(PDF) 71 Page - Renesas Technology Corp |
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SH7205 Fiches technique(HTML) 71 Page - Renesas Technology Corp |
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71 / 1904 page ![]() Section 1 Overview Rev. 1.00 Mar. 25, 2008 Page 39 of 1868 REJ09B0372-0100 Classification Symbol I/O Name Function CTx1, CTx0 O CAN bus transmit data Output pin for transmit data on the CAN bus. Controller area network (RCAN-TL1) CRx1, CRx0 I CAN bus receive data Output pin for receive data on the CAN bus. AN7 to AN0 I Analog input pins Analog input pins. A/D converter (ADC) ADTRG I A/D conversion trigger input External trigger input pin for starting A/D conversion. D/A converter (DAC) DA1, DA0 O Analog output pins Analog output pins. AVcc I Analog power supply Power supply pins for the A/D converter and D/A converter. AVss I Analog ground Ground pins for the A/D converter and D/A converter. Common to analog circuits AVref I Analog reference voltage Analog reference voltage pins for the A/D converter and D/A converter. FOE O Flash memory output enable Address latch enable: Asserted for address output and negated for data I/O. Output enable: Asserted for data input or status read. FSC O Flash memory serial clock Read enable: Data is read on the falling edge of this signal. Serial clock: Data is inputs/output in synchronization with this signal. FCE O Flash memory chip enable Chip enable: Enables the flash memory connected to this LSI. AND/NAND flash memory controller (FLCTL) FCDE O Flash memory command data enable Command latch enable: Asserted at command output. Command data enable: Asserted at command output. |
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