SH7205 datasheet(15/1904 Pages) RENESAS

15 / 1904 page

Rev. 1.00 Mar. 25, 2008 Page xv of xxxii

11.3.6 DMA Reload Byte Count Register (DMRBCTn) ................................................. 382

11.3.7 DMA Mode Register (DMMODn) ....................................................................... 383

11.3.8 DMA Control Register A (DMCNTAn) ............................................................... 392

11.3.9 DMA Control Register B (DMCNTBn) ............................................................... 399

11.3.10 DMA Activation Control Register (DMSCNT).................................................... 403

11.3.11 DMA Interrupt Control Register (DMICNT) ....................................................... 404

11.3.12 DMA Common Interrupt Control Register (DMICNTA)..................................... 405

11.3.13 DMA Interrupt Status Register (DMISTS) ........................................................... 406

11.3.14 DMA Transfer End Detection Register (DMEDET) ............................................ 407

11.3.15 DMA Arbitration Status Register (DMASTS)...................................................... 409

11.3.16 DMA Two-Dimensional Addressing Column Setting Register

(DM2DCLMm)..................................................................................................... 410

11.3.17 DMA Two-Dimensional Addressing Row Setting Register (DM2DROWm)...... 412

11.3.18 DMA Two-Dimensional Addressing Block Setting Register (DM2DBLKm) ..... 413

11.3.19 DMA Two-Dimensional Addressing Next Row Offset Register

(DM2DNROSTm) ................................................................................................ 414

11.3.20 DMA Two-Dimensional Addressing Next Block Offset Register

(DM2DNBOSTm) ................................................................................................ 415

11.3.21 DMA Two-Dimensional Addressing Next Line Offset Register

(DM2DNLOSTm) ................................................................................................ 416

11.3.22 DMA Reload Two-Dimensional Addressing Column Setting Register

(DMR2DCLMm) .................................................................................................. 417

11.3.23 DMA Reload Two-Dimensional Addressing Row Setting Register

(DMR2DROWm) ................................................................................................. 418

11.3.24 DMA Reload Two-Dimensional Addressing Block Setting Register

(DMR2DBLKm)................................................................................................... 419

11.3.25 DMA Reload Two-Dimensional Addressing Next Row Offset Register

(DMR2DNROSTm).............................................................................................. 420

11.3.26 DMA Reload Two-Dimensional Addressing Next Block Offset Register

(DMR2DNBOSTm).............................................................................................. 421

11.3.27 DMA Reload Two-Dimensional Addressing Next Line Offset Register

(DMR2DNLOSTm).............................................................................................. 422

11.4

Operation ........................................................................................................................... 423

11.4.1 DMA Transfer Mode ............................................................................................ 423

11.4.2 DMA Transfer Conditions .................................................................................... 425

11.4.3 DMA Activation ................................................................................................... 428

11.5

DMA Transfer End and Interrupts ..................................................................................... 433

11.5.1 DMA Transfer End ............................................................................................... 433

11.5.2 DMA Interrupt Requests....................................................................................... 434

11.5.3 DMA End Signal Output ...................................................................................... 436

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