| Moteur de recherche de fiches techniques de composants électroniques |
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SH7205 Fiches technique(PDF) 74 Page - Renesas Technology Corp |
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SH7205 Fiches technique(HTML) 74 Page - Renesas Technology Corp |
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74 / 1904 page ![]() Section 1 Overview Rev. 1.00 Mar. 25, 2008 Page 42 of 1868 REJ09B0372-0100 Classification Symbol I/O Name Function PA15 to PA0, PB18 to PB0, PC10 to PC0, PD2 to PD0, PE13, PE11, PE9, PE7 to PE0, PF4 to PF0, PJ12 to PJ0, PH15 to PH0, PK1, PK0 I/O General port 96 bits of general I/O port pins. I/O ports PE12, PE10, PE8, PG7 to PG0 I General port 11 bits of general input port pin. TCK I Test clock Test-clock input pin. TMS I Test mode select Test-mode select signal input pin. TDI I Test data input Serial input pin for instructions and data. TDO O Test data output Serial output pin for instructions and data. User debugging interface (H-UDI) TRST I Test reset Initialization-signal input pin. AUDATA3 to AUDATA0 O AUD data Branch source or destination address output pins. AUDCK O AUD clock Sync-clock output pin. AUDSYNC O AUD sync signal Data start-position acknowledge- signal output pin. Emulator interface ASEBRKAK/ ASEBRK I/O Break mode acknowledge/ break request Indicates that the E10A-USB emulator has entered its break mode/E10A-USB emulator break input pin. |
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