SH7205 datasheet(9/1904 Pages) RENESAS

9 / 1904 page

Rev. 1.00 Mar. 25, 2008 Page ix of xxxii

Contents

Section 1 Overview................................................................................................1

1.1

SH7205 Features.................................................................................................................... 1

1.2

Product Lineup..................................................................................................................... 11

1.3

Block Diagram ..................................................................................................................... 12

1.4

Pin Assignment .................................................................................................................... 13

1.5

Pin Functions ....................................................................................................................... 34

1.6

Bus Structure........................................................................................................................ 43

Section 2 CPU......................................................................................................45

2.1

Register Configuration......................................................................................................... 45

2.1.1

General Registers.................................................................................................... 45

2.1.2

Control Registers .................................................................................................... 46

2.1.3

System Registers..................................................................................................... 48

2.1.4

Register Banks ........................................................................................................ 49

2.1.5

Initial Values of Registers....................................................................................... 49

2.2

Data Formats........................................................................................................................ 50

2.2.1

Data Format in Registers ........................................................................................ 50

2.2.2

Data Formats in Memory ........................................................................................ 50

2.2.3

Immediate Data Format .......................................................................................... 51

2.3

Instruction Features.............................................................................................................. 52

2.3.1

RISC-Type Instruction Set...................................................................................... 52

2.3.2

Addressing Modes .................................................................................................. 56

2.3.3

Instruction Format................................................................................................... 61

2.4

Instruction Set ...................................................................................................................... 65

2.4.1

Instruction Set by Classification ............................................................................. 65

2.4.2

Data Transfer Instructions....................................................................................... 71

2.4.3

Arithmetic Operation Instructions .......................................................................... 75

2.4.4

Logic Operation Instructions .................................................................................. 78

2.4.5

Shift Instructions..................................................................................................... 79

2.4.6

Branch Instructions ................................................................................................. 80

2.4.7

System Control Instructions.................................................................................... 81

2.4.8

Floating-Point Operation Instructions..................................................................... 83

2.4.9

FPU-Related CPU Instructions ............................................................................... 85

2.4.10 Bit Manipulation Instructions ................................................................................. 86

2.5

Processing States.................................................................................................................. 88

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