SH7205 datasheet(67/1904 Pages) RENESAS

67 / 1904 page

Section 1 Overview

Rev. 1.00 Mar. 25, 2008 Page 35 of 1868

REJ09B0372-0100

Classification

Symbol

I/O

Name

Function

Operating mode

control

ASEMD

ASE mode

During

RES pin assertion period,

input a low level to operate this LSI

in ASE mode. To operate it in

product chip mode, apply a high

level to this pin.

Enables the E10A-USB emulator

functions in ASE mode.

Fix a high level mode when not using

emulator functions.

RES

Power-on reset

This LSI enters the power-on reset

state when this signal goes low.

MRES

Manual reset

This LSI enters the manual reset

state when this signal goes low.

System control

WDTOVF

Watchdog timer

overflow

Outputs an overflow signal from the

WDT.

NMI

Non-maskable

interrupt

Non-maskable interrupt request pin.

Fix it high when not in use.

IRQ7 to IRQ0

Interrupt requests

7 to 0

Maskable interrupt request pins.

Level-input or edge-input detection

can be selected. When the edge-

input detection is selected, the rising

edge, falling edge, or both edges can

also be selected.

Interrupts

PINT7 to PINT0 I

Interrupt requests

7 to 0

Maskable interrupt request pins.

Only level-input detection can be

selected.

User break

controller (UBC)

UBCTRG

User break

trigger output

Trigger output pin for UBC condition

match.

Address bus

A25 to A0

Address bus

Outputs addresses.

Data bus

D31 to D0

I/O

Data bus

Bidirectional data bus.

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