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SH7205 Fiches technique(PDF) 68 Page - Renesas Technology Corp

No de pièce SH7205
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
PDF  1904 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7205 Fiches technique(HTML) 68 Page - Renesas Technology Corp

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Section 1 Overview
Rev. 1.00 Mar. 25, 2008 Page 36 of 1868
REJ09B0372-0100
Classification
Symbol
I/O
Name
Function
CS5 to CS0
O
Chip select 5 to 0 Chip-select signals for external
memory or devices.
RD
O
Read
Indicates that data is read from an
external device.
RD_
WR/WE
O
Read/write
Read/write signal.
WAIT
I
Wait
Inserts wait cycles into bus cycles
during access to the external space.
WE0/BC0/
DQM0
O
Byte select
Indicates a write access to bits 7 to 0
of data in external memory or device.
WE1/BC1/
DQM1
O
Byte select
Indicates a write access to bits 15 to
8 of data in external memory or
device.
WE2/BC2/
DQM2
O
Byte select
Indicates a write access to bits 23 to
16 of data in external memory or
device.
WE3/BC3/
DQM3
O
Byte select
Indicates a write access to bits 31 to
24 of data in external memory or
device.
RAS
O
RAS
Connected to the
RAS pin when
SDRAM is connected.
CAS
O
CAS
Connected to the
CAS pin when
SDRAM is connected.
SDCS1,
SDCS0
O
Chip select
Connected to the
CS pin when
SDRAM is connected.
SDWE
O
SDRAM write
enable
Connects to the WE pin of SDRAM if
SDRAM is connected (
SDWE).
Bus control
CKE
O
CK enable
Connected to the CKE pin when
SDRAM is connected.



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