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STLC5466 Fiches technique(PDF) 26 Page - STMicroelectronics |
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STLC5466 Fiches technique(HTML) 26 Page - STMicroelectronics |
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26 / 130 page ![]() STLC5466 26/130 III.13 - BOUNDARY SCAN The Multi-HDLC is equipped with an IEEE Stand- ard Test Access Port (IEEE Std 1149.1). The boundary scan technique involves the inclusion of a shift register stage adjacent to each component pin so that signals at component boundaries can be controlled and observed using scan testing principle. Its intention is to enable the test of on board interconnections and ASIC production tests. The external interface of the Boundary Scan is composed of the signals TDI, TDO, TCK, TMS and TRST as defined in the IEEE Standard. |
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