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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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STLC5466 Fiches technique(PDF) 70 Page - STMicroelectronics |
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STLC5466 Fiches technique(HTML) 70 Page - STMicroelectronics |
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70 / 130 page  STLC5466 70/130 VI.44 - Timer Register 2 TIMR2 (7C)H This programmable Timer Register 2 indicates the period of the Super Frame Synchronisation signal de- livered by SFS pin (which is an output). The duration of the signal is 250 microseconds. The minimum programmable period is 500 microseconds. The clock frequency of the associated counter is the frequency divided by two of FS Frame Synchronisa- tion signal applied to FS pin (which is an input). bit15 bit8 bit7 bit0 S3 S2 S1 S0 MS9 MS8 MS7 MS6 MS5 MS4 MS3 MS2 MS1 MS0 MM1 MM0 0 to 15s 0 to 999ms 0 to 3x0.25ms After reset (0780)H id 480 ms |
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