EMC2302 datasheet(33/44 Pages) SMSC

33 / 44 page

Dual RPM-Based PWM Fan Controller

Datasheet

SMSC EMC2302

Revision 1.1 (10-12-09)

DATASHEET

5.11

Gain Registers

The Gain registers store the gain terms used by the proportional and integral portions of each of the

RPM-based Fan Speed Control Algorithms. These gain terms are used as the KD, KI, and KP gain

terms in a classic PID control solution.

Bits 5 - 4 - GAINDX[1:0] - Controls the derivative gain term used by the FSC algorithm as shown in

Table 5.18.

Bits 3-2 - GAINIX[1:0] - Controls the integral gain term used by the FSC algorithm as shown in

Table 5.18.

Bits 1-0 - GAINP[1:0] - Controls the proportional gain term used by the FSC algorithm as shown in

Table 5.18.

5.12

Fan Spin Up Configuration Registers

The Fan Spin Up Configuration registers control the settings of Spin Up Routine. The Fan Spin Up

Configuration registers are software locked.

Bit 7 - 6 - DRIVE_FAIL_CNTx[1:0] - Determines how many update cycles are used for the Drive Fail

detection function as shown in Table 5.20. This circuitry determines whether the fan can be driven to

the desired tach target.

Table 5.17 Gain Registers

ADDR

R/W

DEFAULT

35h

R/W

Gain 1

GAIND1[1:0]

GAINI1[1:0]

GAINP1[1:0]

2Ah

45h

R/W

Gain 2

GAIND2[1:0]

GAINI2[1:0]

GAINP2[1:0]

2Ah

Table 5.18 Gain Decode

GAIND OR GAINP OR GAINI [1:0]

RESPECTIVE GAIN FACTOR

4x (default)

Table 5.19 Fan Spin Up Configuration Registers

ADDR

R/W

DEFAULT

36h

R/W

Fan 1 Spin Up

Configuration

DRIVE_FAIL_

CNT1 [1:0]

NOKICK1

SPIN_LVL1[2:0]

SPINUP_TIME

1 [1:0]

19h

46h

R/W

Fan 2 Spin up

Configuration

DRIVE_FAIL_

CNT2 [1:0]

NOKICK2

SPIN_LVL2[2:0]

SPINUP_TIME

2 [1:0]

19h

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