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Dual RPM-Based PWM Fan Controller

Datasheet

SMSC EMC2302

Revision 1.1 (10-12-09)

DATASHEET

Bits 3-2 - PWM_BASE2[1:0] - Determines the base frequency of the PWM2 driver.

Bits 1-0 - PWM_BASE1[1:0] - Determines the base frequency of the PWM1 driver.

5.7

Fan Setting Registers

The Fan Setting register always displays the current setting of the respective fan driver. Reading from

any of the registers will report the current fan speed setting of the appropriate fan driver regardless of

the operating mode. Therefore it is possible that reading from this register will not report data that was

previously written into this register.

While the RPM-based Fan Speed Control Algorithm is active, the register is read only. Writing to the

The contents of the register represent the weighting of each bit in determining the final output voltage.

The output drive for a PWM output is given by Equation [1].

5.8

PWM Divide Registers

The PWM Divide registers determine the final frequency of the respective PWM Fan Driver. Each driver

base frequency is divided by the value of the respective PWM Divide Register to determine the final

Table 5.7 PWM_BASEx[1:0] Bit Decode

PWM_BASEX[1:0]

BASE FREQUENCY

26.00kHz (default)

19.531kHz

4,882Hz

2,441Hz

Table 5.8 Fan Driver Setting Registers

ADDR

R/W

DEFAULT

30h

R/W

Fan 1 Setting

128

00h

40h

R/W

Fan 2 Setting

128

00h

[1]

Table 5.9 PWM Divide Registers

ADDR

R/W

DEFAULT

31h

R/W

Fan 1 Divide

128

01h

41h

R/W

Fan 2 Divide

128

01h

Drive

VALUE

255

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