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SAMA5D2 Fiches technique(PDF) 42 Page - Microchip Technology |
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SAMA5D2 Fiches technique(HTML) 42 Page - Microchip Technology |
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42 / 56 page ![]() 8.3.2.2 Power-down Considerations The figure below shows the SAMA5D2 LPDDR2 SIP power-down sequence that starts by asserting the NRST line to 0. Once NRST is asserted, the supply inputs can be immediately shut down without any specific timing or order except for DDRM_VDD12 and DDRM_VDD18. VDDBU may not be shut down if the application uses a backup battery on this supply input. In applications where VDDFUSE is powered, it is mandatory to shut down VDDFUSE prior to removing any other supply. VDDFUSE can be removed before or after asserting the NRST signal. Figure 8-2. Recommended Power-down Sequence t RSTPD VDDAUDIOPLL VDDIOP0 VDDANA VDDOSC time NRST VDDIOP1 VDDIOP2 VDDISC VDDSDMMC DDRM_VDD18 VDDUTMII No specific order and no specific timing required among the channels except DDRM_VDD12 and DDRM_VDD18 VDDBU VDDFUSE VDDCORE VDDPLLA VDDHSIC VDDUTMIC t 1 DDRM_VDD12, VDDIODDR t 3 t 2 Table 8-2. Power-down Timing Specification Symbol Parameter Conditions Min Max Unit tRSTPD Reset delay at power-down From NRST low to the first supply turn-off 0 – ms t1 VDDFUSE delay at shut-down From VDDFUSE < 1V to the first supply turn-off 0 – t2 DDRM_VDD12 to DDRM_VDD18 delay From DDRM_VDD12 zeroed to DDRM_VDD18 turn-off 0 – t3 LPDDR2 power-off delay From NRST low to DDRM_VDD18 zeroed – 2000 8.3.2.3 Backup Mode Entry (Shutdown) The figure below shows the recommended power-down sequence to place the SAMA5D2 LPDDR2 SIP either in Backup mode or in Backup mode with the LPDDR2 in self-refresh. The SHDN signal, an output of the Shutdown Controller (SHDWC), signals the shutdown request to the power supply. This output is supplied by VDDBU that is present in Backup mode. Placing the LPDDR2 memory in self-refresh while in Backup mode requires maintaining VDDIODDR, DDRM_VDD18 and DDRM_VDD12 as well. One possible way to signal this additional need to the power supply is to position one of the general-purpose I/Os supplied by VDDBU (PIOBUx) in a predefined state. SAMA5D2 SIP Electrical Characteristics © 2021 Microchip Technology Inc. Datasheet DS60001484D-page 42 |
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