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SPEAR1310 Fiches technique(PDF) 38 Page - STMicroelectronics

No de pièce SPEAR1310
Description  Dual-core Cortex A9 embedded MPU for communications
PDF  57 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR1310 Fiches technique(HTML) 38 Page - STMicroelectronics

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Synchronous serial port (SSP)
SPEAr1310
38/57
Doc ID 17528 Rev 4
24
Synchronous serial port (SSP)
The synchronous serial port (SSP) block includes a master or slave interface to enable
synchronous serial communication with slave or master peripherals.
24.1
Main features
Master or slave operation
Programmable clock bit rate and prescaler
Separate transmit and receive first-in, first-out memory buffers, 16-bit wide, 8 locations
deep
Programmable choice of interface operation, SPI, Microwire, or TI synchronous serial
Programmable data frame size from 4 to 16 bits
Independent masking of transmit FIFO, receive FIFO, and receive overrun interrupts
Internal loopback test mode available
Support for direct memory access (DMA)



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