SPEAR1310 datasheet(11/57 Pages) STMICROELECTRONICS

No de pièce	SPEAR1310

Description	Dual-core Cortex A9 embedded MPU for communications

PDF	57 Pages

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Fabricant	STMICROELECTRONICS [STMicroelectronics]

Site Internet	http://www.st.com

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SPEAr1310

Multilayer interconnect matrix (BUSMATRIX)

Doc ID 17528 Rev 4

11/57

Multilayer interconnect matrix (BUSMATRIX)

The multilayer interconnect matrix is the connectivity infrastructure that enables data

exchange between the various blocks of the device. This structure supports parallel

communications between master and slave components, and ensures the maximum level of

system throughput.

Note:

In this document, the words initiator agent (IA) and master are synonyms ; target agent (TA)

and slave are synonyms.

2.1

Main features

●

Hierarchical structure to meet the requirements of different system blocks and

peripherals:

–

High performance low latency

–

High performance medium latency

–

Medium performance medium/long latency

–

Slow peripherals and configurations

●

Power awareness through the power down request/acknowledgement of the power

management module

●

Single interrupt for outbound signaling

SPEAR1310 Fiches technique(PDF) 11 Page - STMicroelectronics