ADS5294 datasheet(6/67 Pages) TI1

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ADS5294

SLAS776B – NOVEMBER 2011 – REVISED JULY 2012

www.ti.com

RECOMMENDED OPERATING CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLIES

AVDD

Analog supply voltage

1.7

1.8

1.9

LVDD

Digital supply voltage

1.7

1.8

1.9

ANALOG INPUTS/OUTPUTS

Differential input voltage range

VPP

Input common-mode voltage

0.95±0.05

REFT

External reference mode

1.45

REFB

External reference mode

0.45

VCM

Common-mode voltage output

0.95

External Reference mode Input

1.5

Maximum Input Frequency (1)

2 VPP amplitude

MHz

CLOCK INPUTS

ADC Clock input sample rate

MSPS

Sine wave, AC-coupled

0.2

1.5

Input Clock amplitude differential (V(CLKP) -

LVPECL, AC-coupled

0.2

1.6

VPP

V(CLKN)) peak-to-peak

LVDS, AC-coupled

0.2

0.7

VIL

<0.3

Input Clock CMOS single-ended (V(CLKP))

VIH

>1.5

Input clock duty cycle

35%

50%

65%

DIGITAL OUTPUTS

1x (sample

ACLKP and ACLKN outputs (LVDS), 1-wire interface

MSPS

rate)

7x (sample

LCLKP and LCLKN outputs (LVDS), 1-wire interface

MSPS

rate)

0.5x (sample

ACLKP and ACLKN outputs (LVDS), 2-wire interface

MSPS

rate)

3.5x (sample

LCLKP and LCLKN outputs (LVDS), 2-wire interface

MSPS

rate)

Maximum data rate, 2-wire interface

560

Mbps

Maximum data rate, 1-wire interface

700

Mbps

CLOAD Maximum external capacitance from each output pin to LGND

RLOAD Differential load resistance between the LVDS output pairs

100

Operating free-air temperature

-40

°C

(1)

See the Large and Small Signal Input Bandwidth section.

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