ADS5294 datasheet(22/67 Pages) TI1

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−80

−70

−60

−50

−40

−30

−20

−10

0.01

0.1

Frequency of signal on supply (MHz)

PSMR

PSRR

With 50mVpp signal

superimposed on AVDD supply

PSMR: 3MHz input signal applied

PSRR: No input signal applied

−80

−70

−60

−50

−40

−30

−20

−10

0.0

0.1

0.2

0.3

0.4

0.5

Normalized Frequency (fin/fs)

Low Pass

High pass

0.03

0.1

16.18

45.5

31.53

5.55

0.11

Frequency of CMRR signal (MHz)

With 50mVpp signal superimposed on input common−mode

Fin = 3 MHz

ADS5294

SLAS776B – NOVEMBER 2011 – REVISED JULY 2012

www.ti.com

TYPICAL CHARACTERISTICS (continued)

Typical values are at 25°C, AVDD = 1.8 V, LVDD = 1.8V, 50% clock duty cycle, –1 dBFS differential analog input, 14 Bit/80

MSPS, ADC is configured in the internal reference mode, unless otherwise noted.

Figure 28. Histogram of Output Code with Analog Inputs

Figure 29. Common Mode Rejection Ratio vs. Frequency

Shorted

Figure 30. Power Supply Rejection Ratio vs. Frequency

Figure 31. Filter Response, Decimate by 2

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