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ST10F280 Fiches technique(PDF) 49 Page - STMicroelectronics |
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ST10F280 Fiches technique(HTML) 49 Page - STMicroelectronics |
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49 / 239 page ![]() ST10F280 Internal Flash memory Doc ID 8673 Rev. 3 49/239 Figure 6. Hardware provisions to activate the BSL Figure 7. Memory configuration after reset 5.6.3 Loading the startup code After sending the identification Byte the BSL enters a loop to receive 32 Bytes via ASC0. These Byte are stored sequentially into locations 00’FA40h through 00’FA5Fh of the internal RAM. So up to 16 instructions may be placed into the RAM area. To execute the loaded code the BSL then jumps to location 00’FA40h, which is the first loaded instruction. The bootstrap loading sequence is now terminated, the ST10F280 remains in BSL mode, however. Most probably the initially loaded routine will load additional code or data, as an average application is likely to require substantially more than 16 instructions. This second receive loop may directly use the pre-initialized interface ASC0 to receive data and store it to arbitrary user-defined locations. This second level of loaded code may be the final application code. It may also be another, more sophisticated, loader routine that adds a transmission protocol to enhance the integrity 16 MBytes 16 MBytes 16 MBytes BSL mode active Yes (P0L.4=’0’) Yes (P0L.4=’0’) No (P0L.4=’1’) EA pin High Low Access to application Code fetch from internal Flash area Test-Flash access Test-Flash access User Flash access Data fetch from internal Flash area User Flash access User Flash access User Flash access IRAM 1 0 User Flash Test Flash Segment 2 255 Access to: external bus disabled internal enabled Flash 1 0 User Flash Test Flash Segment 2 255 Access to: external bus enabled internal enabled Flash IRAM 1 0 User Flash Segment 2 255 Access: depends on reset config EA, Port0 depends on reset config EA, Port0 IRAM |
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