ST10F280_12 datasheet(20/239 Pages) STMICROELECTRONICS

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ST10F280

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Doc ID 8673 Rev. 3

P4.0 – P4.7

I/O

Port 4 is an 8-bit bidirectional I/O port. It is bit-wise programmable

for input or output via direction bits. For a pin configured as input,

the output driver is put into high-impedance state. The input

threshold is selectable (TTL or special).

P4.6 & P4.7 outputs can be configured as push-pull or open-drain

drivers.

In case of an external bus configuration, Port 4 can be used to

output the segment address lines:

N16

P4.0 A16 Least Significant Segment Address Line

M15

P4.1 A17 Segment Address Line

L14

P4.2 A18 Segment Address Line

M16

P4.3 A19 Segment Address Line

L15

P4.4 A20 Segment Address Line

CAN2_RxD CAN2 Receive Data Input

L16

P4.5 A21 Segment Address Line

CAN1_RxD CAN1 Receive Data Input

K14

P4.6 A22 Segment Address Line, CAN_TxD

CAN1_TxD CAN1 Transmit Data Output

K15

P4.7 A23 Most Significant Segment Address Line

CAN2_TxD CAN2 Transmit Data Output

J14

External Memory Read Strobe. RD is activated for every external

instruction or data read access.

WR/WRL

J15

External Memory Write Strobe. In WR-mode this pin is activated for

every external data write access. In WRL-mode this pin is activated

for low byte data write accesses on a 16-bit bus, and for every data

write access on an 8-bit bus. See WRCFG in register SYSCON for

mode selection.

READY/

READY

J16

Ready Input. The active level is programmable. When the Ready

function is enabled, the selected inactive level at this pin during an

external memory access will force the insertion of memory cycle

time waitstates until the pin returns to the selected active level.

ALE

J17

Address Latch Enable Output. Can be used for latching the

address into external memory or an address latch in the

multiplexed bus modes.

H17

External Access Enable pin. A low level at this pin during and after

Reset forces the ST10F280 to begin instruction execution out of

external memory. A high level forces execution out of the internal

Flash Memory.

Table 1.

Ball description (continued)

Symbol

Ball

number

Type

Function

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