ST10F280_12 datasheet(36/239 Pages) STMICROELECTRONICS

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Internal Flash memory

ST10F280

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Doc ID 8673 Rev. 3

Note:

The Address of Flash Status Register is the address of the word being programmed when

Programming operation is in progress, or an address within block being erased when

Erasing operation is in progress.

5.3.4

Flash Protection Register

The Flash Protection register is a non-volatile register that contains the protection status.

This register can be read by using the Read Protection Status (RP) command, and

programmed by using the dedicated Set Protection command.

Flash Protection Register (PR)

Type:

R/W

5.3.5

Instructions description

Twelve instructions dedicated to Flash memory accesses are defined as follow:

Read/Reset (RD). The Read/Reset instruction consist of one write cycle with data XXF0h. it

can be optionally preceded by two CI enable coded cycles (data xxA8h at address 1554h +

FSB.2 Flash Status bit 2: Toggle Bit

This toggle bit, together with FSB.6, can be used to determine the chip status during the

Erase Mode or Erase Suspend Mode. It can be used also to identify the block being Erased

Suspended. A Read operation will cause FSB.2 to Toggle during the Erase Mode. If the

Flash is in Erase Suspend Mode, a Read operation from the Erase suspended block or a

Program operation into the Erase suspended block will cause FSB.2 to toggle.

When the Flash is in Program Mode during Erase Suspend, FSB.2 will be read as ‘1’ if

address used is the address of the word being programmed.

After Erase completion with an Error status, FSB.2 will toggle when reading the faulty sector.

987654

----

BP10

BP9

BP8

BP7

BP6

BP5

BP4

BP3

BP2

BP1

BP0

R/W

BPx Block x Protection bit (x = 0...10)

‘0’: the Block Protection is enabled for block x. Programming or erasing the block is not

possible, unless a Block Temporary Unprotection command is issued.

1’: the Block Protection is disabled for block x.

Bit is ‘1’ by default, and can be programmed permanently to ‘0’ using the Set Protection

command but then cannot be set to ‘1’ again. It is therefore possible to temporally disable

the Block Protection using the Block Temporary Unprotection instruction.

CP Code Protection Bit

‘0’: the Flash Code Protection is enabled. Read accesses to the Flash for execution not

performed in the Flash itself are not allowed, the returned value will be 009Bh, whatever the

content of the Flash is.

1’: the Flash Code Protection is disabled: read accesses to the Flash from external or

internal RAM are allowed

Bit is ‘1’ by default, and can be programmed permanently to ‘0’ using the Set Protection

command but then cannot be set to ‘1’ again. It is therefore possible to temporarily disable

the Code Protection using the Code Temporary Unprotection instruction.

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