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ST10F280 Fiches technique(PDF) 47 Page - STMicroelectronics |
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ST10F280 Fiches technique(HTML) 47 Page - STMicroelectronics |
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47 / 239 page ![]() ST10F280 Internal Flash memory Doc ID 8673 Rev. 3 47/239 5.6.1 Entering the bootstrap loader The ST10F280 enters BSL mode when pin P0L.4 is sampled low at the end of a hardware reset. In this case the built-in bootstrap loader is activated independent of the selected bus mode. The bootstrap loader code is stored in a special Boot-ROM. No part of the standard mask Memory or Flash Memory area is required for this. After entering BSL mode and the respective initialization the ST10F280 scans the RxD0 line to receive a zero Byte, one start Bit, eight ‘0’ data Bits and one stop Bit. From the duration of this zero Byte it calculates the corresponding Baud rate factor with respect to the current CPU clock, initializes the serial interface ASC0 accordingly and switches pin TXD0 to output. Using this Baud rate, an identification Byte is returned to the host that provides the loaded data. This identification Byte identifies the device to be booted. Identification byte is D5h for the ST10F280. Figure 5. Bootstrap loader sequence |
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