ST10F280_12 datasheet(87/239 Pages) STMICROELECTRONICS

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ST10F280

PWM module

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Figure 23.

Operation and output waveform in single shot mode

11.2.2

XPWM module registers

The XPWM module is controlled via two sets of registers. The waveforms are selected by

the channel specific registers XPTx (timer), XPPx (period) and XPWx (pulse width).

Three common registers control the operating modes and the general functions

(XPWMCON0 and XPWMCON1) of the PWM module as well as the interrupt behavior

(XP2IC).

Up/down counters XPTx

Each counter XPTx of a PWM channel is clocked either directly by the CPU clock or by the

CPU clock divided by 64. Bit PTIx in register XPWMCON0 selects the respective clock

source. A XPWM counter counts up or down (controlled by hardware), while its respective

run control bit PTRx is set. A timer is started (PTRx = ’1’) via software and is stopped (PTRx

= ’0’) either via hardware or software, depending on its operating mode. Control bit PTRx

enables or disables the clock input of counter XPTx rather than controlling the XPWM output

signal.

Note:

For the register locations please refer to the Table 15.

Table 16 summarizes the XPWM frequencies that result from various combinations of

operating mode, counter resolution (input clock) and pulse width resolution.

Period registers XPPx

The 16-bit period register XPPx of a XPWM channel determines the period of a PWM cycle,

i.e. the frequency of the PWM signal. This register is buffered with a shadow register. The

shadow register is loaded from the respective XPPx register at the beginning of every new

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