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PM0214 Fiches technique(PDF) 113 Page - STMicroelectronics |
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PM0214 Fiches technique(HTML) 113 Page - STMicroelectronics |
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113 / 245 page ![]() DocID022708 Rev 4 113/245 PM0214 The STM32 Cortex-M4 instruction set 244 3.6.4 SMLAD Signed multiply accumulate long dual Syntax op{X}{cond} Rd, Rn, Rm, Ra ; where: • op is one of: SMLAD: Signed multiply accumulate dual SMLADX: Signed multiply accumulate dual reverse. X specifies which halfword of the source register Rn is used as the multiply operand. If X is omitted, the multiplications are bottom × bottom and top × top. If X is present, the multiplications are bottom × top and top × bottom. • ‘cond’ is an optional condition code (see Conditional execution on page 64) • ‘Rd’ is the destination register. • ‘Rn’ is the first operand register holding the values to be multiplied • ‘Rm’ is the second operand register • ‘Ra’ is the accumulate value Operation The SMLAD and SMLADX instructions regard the two operands as four halfword 16-bit values. The SMLAD and SMLADX instructions: 1. Either: a) If X is not present, multiply the top signed halfword value in Rn with the top signed halfword of Rm and the bottom signed halfword values in Rn with the bottom signed halfword of Rm. a) If X is present, multiply the top signed halfword value in Rn with the bottom signed halfword of Rm and the bottom signed halfword values in Rn with the top signed halfword of Rm. 2. Add both multiplication results to the signed 32-bit value in Ra. 3. Write the 32-bit signed result of the multiplication and addition to Rd. Restrictions Do not use SP or PC. Condition flags These instructions do not change the flags. Examples SMLAD R10, R2, R1, R5 ; Multiplies two halfword values in R2 with ; corresponding halfwords in R1, adds R5 and writes ; to R10 SMLALDX R0, R2, R4, R6 ; Multiplies top halfword of R2 with bottom halfword ; of R4, multiplies bottom halfword of R2 with top ; halfword of R4, adds R6 and writes to R0. |
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