PM0214 datasheet(68/245 Pages) STMICROELECTRONICS

68 / 245 page

The STM32 Cortex-M4 instruction set

PM0214

68/245

DocID022708 Rev 4

3.4

Memory access instructions

Table 25 shows the memory access instructions:

Table 25. Memory access instructions

Mnemonic

Brief description

See

ADR

Load PC-relative address

ADR on page 69

CLREX

Clear exclusive

CLREX on page 79

LDM{mode}

Load multiple registers

LDM and STM on page 75

LDR{type}

Load register using immediate offset

LDR and STR, immediate offset on page 70

LDR{type}

Load register using register offset

LDR and STR, register offset on page 72

LDR{type}T

Load register with unprivileged access

LDR and STR, unprivileged on page 73

LDR

Load register using PC-relative address LDR, PC-relative on page 74

LDRD

Load register dual

LDR and STR, immediate offset on page 70

LDREX{type} Load register exclusive

LDREX and STREX on page 78

POP

Pop registers from stack

PUSH and POP on page 77

PUSH

Push registers onto stack

PUSH and POP on page 77

STM{mode}

Store multiple registers

LDM and STM on page 75

STR{type}

Store register using immediate offset

LDR and STR, immediate offset on page 70

STR{type}

Store register using register offset

LDR and STR, register offset on page 72

STR{type}T

Store register with unprivileged access LDR and STR, unprivileged on page 73

STREX{type} Store register exclusive

LDREX and STREX on page 78

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