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STLC5465B Fiches technique(PDF) 61 Page - STMicroelectronics

No de pièce STLC5465B
Description  MULTI-HDLCWITH n x 64 SWITCHING MATRIX ASSOCIATED
PDF  101 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC5465B Fiches technique(HTML) 61 Page - STMicroelectronics

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NCS0/1
READY
NAS/ALE
NDS/NRD
AD0/15
R/W / NWR
NBHE A16/19
t6
t10
t5
t9
t11
t7
t8
t12
t4
t3
t1
t2
D0/15
NBHE
NBHE
A16/19
A0/15
Figure 50 : 80C186 Read Cycle
VII - MICROPROCESSOR TIMING (continued)
VII.5 - 80C186 MOD0=1, MOD1=1, MOD2=1
Symbol
Parameter
Min.
Typ.
Max.
Unit
t1
Delay Ready / Chip Select (if t3 > t1), (30pF)
Delay when immediate access
VDD =5V
V DD = 3.3V
0
98
108
ns
ns
ns
t2
Hold Time Chip Select / NRD
10
ns
t3
Delay Ready / ALE (if t1 > t3), (30pF)
Delay when immediate access
VDD =5V
V DD = 3.3V
0
98
108
ns
ns
t4
Width ALE
20
ns
t5
Set-up Time Address / ALE
5
ns
t6
Hold Time Address / ALE
VDD =5V
VDD = 3.3V
5
10
ns
ns
t7
Data Valid after Ready
0
15
ns
t8
Data Valid after NRD (30pF)
0
15
ns
t9
Set-up Time NBHE-Address A16/19 / ALE
5
ns
t10
Hold Time Address A1619 / NRD
10
ns
t11
Hold Time NBHE- / NRD
10
ns
t12
Delay NRD / NCS
0
ns
STLC5465B
61/101



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