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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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STLC5465B Fiches technique(PDF) 14 Page - STMicroelectronics |
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STLC5465B Fiches technique(HTML) 14 Page - STMicroelectronics |
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14 / 101 page  Figure 1 : General Block Diagram II - BLOCK DIAGRAM The top level functionalities of Multi-HDLC appear on the general block diagram. There are : - The switching matrix, - The time slot assigner, - The 32 HDLC transmitters with associated DMA controllers, - The 32 HDLC receivers with associated DMA controllers, - The 16 Command/Indicate and Monitor Channel transmitters belonging to two General Compo- nent Interfaces(GCI), - The 16 Command/Indicate and Monitor Channel receivers belonging to two General Component Interfaces (GCI), - The memory interface, - The microprocessor interface, - The bus arbitration, - The clock selection and time synchronization function, - The interrupt controller, - The watchdog, - The boundary scan. STLC5465B 14/101 |
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