STLC5465B datasheet(85/101 Pages) STMICROELECTRONICS

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bit15

bit8

bit7

bit 0

ANA11 VCI11 V*11 VM11 ANA10 VCI10 V*10 VM10 ANA01 VCI01 V*01 VM01 ANA00 VCI00 V*00 VM00

TDM5

TDM4

TDM5

TDM4

GCI CHANNEL 1

GCI CHANNEL 0

After reset (0000)H

VMxy

: VALIDATION of MONITOR CHANNELx, MULTIPLEX y :

When this bit is at 1, monitor channel xy is validated.

When this bit is at 0, monitor channel xy is not validated.

On line to reset (if necessary) one MON channel which had been selected previously VMxy must

be put at 0 during 125ms before reselecting this channel. Deselecting one MON channel during

125ms resets this MON channel.

V*xy

: VALIDATION of V Starx, MULTIPLEX y

When this bit is at 1, V Star protocol is validated if VMxy=1.

When this bit is at 0, GCI Monitor protocol is validated if VMxy=1.

VCxy

: VALIDATION of Command/Indicate CHANNEL x, MULTIPLEXy

When this bit is at 1, Command/Indicate channelxy is validated.

When this bit is at 0, Command/Indicate channelxy is not validated.

It is necessary to let VCxy at ”0” during 125ms to initiate the Command/Indicate channel.

ANAxy : ANALOG APPLICATION

When this bit is at 1, Primitive has 6 bits if C/Ixy is validated.

When this bit is at 0, Primitive has 4 bits if C/Ixy is validated.

VIII.19 - GCI Channels Definition Register 1 - GCIR1 (24)H

bit15

bit8

bit7

bit 0

ANA31 VCI31 V*31 VM31 ANA30 VCI30 V*30 VM30 ANA21 VCI21 V*21 VM21 ANA20 VCI20 V*20 VM20

TDM5

TDM4

TDM5

TDM4

GCI CHANNEL 3

GCI CHANNEL 2

After reset (0000)H

For definition see GCI Channels Definition Register above.

VIII.20 - GCI Channels Definition Register 2 - GCIR2 (26)H

bit15

bit8

bit7

bit 0

ANA51 VCI51 V*51 VM51 ANA50 VCI50 V*50 VM30 ANA41 VCI41 V*41 VM41 ANA40 VCI40 V*40 VM40

TDM5

TDM4

TDM5

TDM4

GCI CHANNEL 5

GCI CHANNEL 4

After reset (0000)H

For definition see GCI Channels Definition Register above.

VIII.21 - GCI Channels Definition Register 3 - GCIR3 (28)H

bit15

bit8

bit7

bit 0

ANA71 VCI71 V*71 VM71 ANA70 VCI70 V*70 VM70 ANA61 VCI61 V*61 VM61 ANA60 VCI60 V*60 VM60

TDM5

TDM4

TDM5

TDM4

GCI CHANNEL 7

GCI CHANNEL 6

After reset (0000)H

For definition see GCI Channels Definition Register above.

VIII - INTERNAL REGISTERS (continued)

STLC5465B

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