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STLC5465B Fiches technique(PDF) 59 Page - STMicroelectronics

No de pièce STLC5465B
Description  MULTI-HDLCWITH n x 64 SWITCHING MATRIX ASSOCIATED
PDF  101 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC5465B Fiches technique(HTML) 59 Page - STMicroelectronics

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NCS0/1
READY
NAS/ALE
NDS/NRD
AD0/7
R/W / NWR
t6
t5
t7
t8
t12
t4
t3
t1
t2
D0/7
A0/7
Figure 48 : 80C188 Read Cycle
VII - MICROPROCESSOR TIMING (continued)
VII.4 - 80C188 MOD0=1, MOD1=1, MOD2=0
Symbol
Parameter
Min.
Typ.
Max.
Unit
t1
Delay Ready / Chip Select (if t3 > t1), (30pF)
Delay when immediate access
VDD =5V
V DD = 3.3V
0
98
108
ns
ns
ns
t2
Hold Time Chip Select / NRD
10
ns
t3
Delay Ready / ALE (if t1 > t3), (30pF)
Delay when immediate access
VDD =5V
V DD = 3.3V
0
98
108
ns
ns
ns
t4
Width ALE
20
ns
t5
Set-up Time Address / ALE
5
ns
t6
Hold Time Address / ALE
V DD =5V
V DD = 3.3V
5
10
ns
ns
t7
Data Valid after Ready
0
15
ns
t8
Data Valid after NRD (30pF)
0
ns
t12
Delay NDS / NCS
0
ns
STLC5465B
59/101



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