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PCF8811U/2DA/1 Fiches technique(PDF) 70 Page - NXP Semiconductors |
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PCF8811U/2DA/1 Fiches technique(HTML) 70 Page - NXP Semiconductors |
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70 / 81 page ![]() PCF8811_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 27 June 2008 70 of 81 NXP Semiconductors PCF8811 80 x 128 pixels matrix LCD driver 18.1.2 Temperature coefficient selection The second feature is an OTP factory default setting for the temperature coefficient selection (MMTC) in the basic command set. This 3-bit value will be loaded from OTP after leaving the Power-save mode or by the Refresh command. The idea of this feature is to provide, in the basic command set, the complete set of temperature coefficients without an additional command. In the extended command set the temperature coefficient can be programmed as given in Table 20 and Table 30. 18.1.3 Seal bit The module maker programming is performed in a special mode: the calibration mode (CALMM). This mode is entered via a special interface command, CALMM. To prevent unwanted programming, a seal bit has been implemented which prevents the device from entering the calibration mode. This seal bit, once programmed, cannot be reversed so further changes in programmed values are not possible. Applying the programming voltages when not in CALMM mode has no effect on the programmed values. 0 1010 +10 1 0101 −11 0 1011 +11 1 0100 −12 0 1100 +12 1 0011 −13 0 1101 +13 1 0010 −14 0 1110 +14 1 0001 −15 0 1111 +15 1 0000 −16 Fig 51. VLCD calibration Table 36. VOS/MMVOPCAL values in two’s complement notation …continued Binary Decimal Binary Decimal mgu287 OTP VLCD calibration: 5-bit offset MMVOPCAL[4:0] VOP[7:0] range: 0 to +255 range −16 to +15 range −16 to +15 range 0 to +255 usable range +32 to +255 to high voltage generator laser trim pins: 5-bit offset VOS[4:0] VPR register: 8-bit value VPR[7:0] + + Table 37. Seal bit definition Seal bit Action 0 possible to enter calibration mode 1 calibration mode disabled |
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