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PCF8811U/2DA/1 Fiches technique(PDF) 31 Page - NXP Semiconductors |
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PCF8811U/2DA/1 Fiches technique(HTML) 31 Page - NXP Semiconductors |
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31 / 81 page ![]() PCF8811_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 27 June 2008 31 of 81 NXP Semiconductors PCF8811 80 x 128 pixels matrix LCD driver 11. I2C-bus interface 11.1 Characteristics of the I2C-bus (Hs-mode) The I2C-bus Hs-mode is for bidirectional, two-line communication between different ICs or modules with speeds of up to 3.4 MHz. The only difference between Hs-mode slave devices and F/S-mode slave devices is the speed at which they operate. Because of this the buffers on the SCLH and SDAH have open-drain outputs. This is the same for I2C-bus master devices which have an open-drain SDAH output and a combination of an open-drain, pull-down and current source pull-up circuits on the SCLH output. Only the current source of one master is enabled at any one time, and only during Hs-mode. Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy. 11.1.1 System configuration The system configuration is shown in Figure 25. Definitions of the I2C-bus terminology: • transmitter: the device which sends the data to the bus • receiver: the device which receives the data from the bus • master: the device which initiates a transfer, generates clock signals and terminates a transfer • slave: the device addressed by a master • multi-master: more than one master can attempt to control the bus at the same time without corrupting the message • arbitration: procedure to ensure that, if more than one master simultaneously tries to control the bus, only one is allowed to do so and the message is not corrupted • synchronization: procedure to synchronize the clock signals of two or more devices Fig 24. Read mode serial interface 3-line 001aai351 SCE SCLK SDATA SDO DB7 D/C DB6 DB5 DB4 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB3 DB2 DB1 DB0 D/C |
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