PCF8811USLASH2DASLASH1 datasheet(64/81 Pages) NXP

64 / 81 page

PCF8811_4

Product data sheet

Rev. 04 — 27 June 2008

64 of 81

NXP Semiconductors

PCF8811

80 x 128 pixels matrix LCD driver

16.3 I2C-bus interface timing characteristics

[1]

All speciﬁed timings are based on 20 % and 80 % of VDD.

Fig 44. Serial interface timing; 3-line serial interface (read mode)

001aai354

tH1

tS1

SCE

SCLK

SDO

SDATA

Table 34.

I2C-bus characteristics; F/S-mode

VDD1 = 1.8 V to 3.3 V; VSS = 0 V; VLCD ≤ 9 V; Tamb = −40 °C to +85 °C; unless otherwise speciﬁed[1]; see Figure 45.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fSCL

SCL clock frequency

400

kHz

tSU;STA

set-up time for a repeated START condition

600

tHD;STA

hold time (repeated) START condition

600

tLOW

LOW period of the SCL clock

1300

tHIGH

HIGH period of the SCL clock

600

tSU;DAT

data set-up time

100

tHD;DAT

data hold time

900

rise time of both SDA and SCL signals

20 + 0.1Cb -

300

fall time of both SDA and SCL signals

20 + 0.1Cb -

300

capacitive load for each bus line

400

tSU;STO

set-up time for STOP condition

600

tSP

pulse width of spikes that must be

suppressed by the input ﬁlter

tBUF

bus free time between a STOP and START

condition

1300

VnL

noise margin at the LOW level

for each connected device

(including hysteresis)

0.1VDD1

VnH

noise margin at the HIGH level

for each connected device

(including hysteresis)

0.2VDD1

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