PCF8811USLASH2DASLASH1 datasheet(35/81 Pages) NXP

35 / 81 page

PCF8811_4

Product data sheet

Rev. 04 — 27 June 2008

35 of 81

NXP Semiconductors

PCF8811

80 x 128 pixels matrix LCD driver

After the acknowledgement cycle of a write (W), one or more command words will follow

which deﬁne the status of the addressed slaves. A command word consists of a control

byte, which deﬁnes continuation bit Co and D/C, plus a data byte; see Figure 31 and

Table 9.

The last control byte is initiated by bit Co (a cleared MSB). The control and data bytes are

also acknowledged by all addressed slaves on the bus.

A read sequence is shown in Figure 32 and again this sequence follows after the

Hs-mode is selected. The PCF8811 will immediately start to output the requested data

until a not-acknowledge is transmitted by the master. Before the read access, the user has

to set the D/C bit to the appropriate value by a preceding write access. The write access

must be terminated by a RESTART condition so that the Hs-mode is not disabled.

After the last control byte, depending on the D/C bit setting, either a series of display data

bytes or command data bytes may follow. If the D/C bit was set to logic 1, these display

bytes are stored in the display RAM at the address speciﬁed by the data pointer.

Fig 31. Master transmits in Hs-mode to slave receiver; write mode

mgw749

Sr 01111

acknowledge

from PCF8811

acknowledge

from PCF8811

acknowledge

from PCF8811

acknowledge

from PCF8811

acknowledge

from PCF8811

control byte

data byte

≥ 0 bytes

1 byte

slave address

MSB . . . . . . . . . . . LSB

≥ 0 bytes

A P

control byte

D/C

R/W

Table 9.

Co and D/C deﬁnitions

Bit

Logic state R/W

Action

N/A

last control byte to be sent; only a stream of data bytes are allowed to

follow; this stream may only be terminated by a STOP or RESTART

condition

1N/A

another control byte will follow the data byte unless a STOP or

RESTART condition is received

D/C

data byte will be decoded and used to set-up the device

data byte will return the status byte

data byte will be stored in the display RAM

RAM read back is not supported

Fig 32. Master receives from slave transmitter (status register is read); read mode

mgw750

Sr 01111

acknowledge

from PCF8811

not-acknowledge

from master

status information

slave address

STOP condition

R/W

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