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STLC5460 Fiches technique(PDF) 43 Page - STMicroelectronics |
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STLC5460 Fiches technique(HTML) 43 Page - STMicroelectronics |
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43 / 54 page ![]() AUXILIARY MEMORY ACCESSES: CM=0 Write Auxiliary Memory: Receive Monitor channels CMD and SRC registers are written if their bits have not the right value. CMD and SRC registers can be written in any order. DST register is always written the last. RCM Not used 00 Data to initiate CMD SRC DST 8 6 IN AUXILIARY MEMORY 16 words assigned t o 8 RX MON channels of MUX 0 & 8 RX MON channels of MUX 1 A R=0 Write CM=0 Auxiliary Memory MON TX 1of 16TX MON 10 channel s Read Auxiliary Memory in two steps: Receive Monitor channels First step: register writing: CMD register is written if its bits are not the right value. SRC register is not written. DST register is always written the last. R CM bits not used 10 Register not written CMD SRC DST RCM MON status 10 data which has been received MON TX 1 of 16 TX MON 1 0 channels CMD SRC DST 6 8 2 3 A AUXILIARY MEMORY 16 words assigned to 8 RX MON channels of MUX0 & 8 RX MON channels of MUX1 OUT OUT MON TX 1of 16 TX MON 10 channels Second step, register reading: CMD and SRC registers may be read in any order. DST register is not changed. STLC5460 43/54 |
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