STLC5460 datasheet(25/54 Pages) STMICROELECTRONICS

25 / 54 page

OVR

Overrun.

When OVR = 1, the previous primitive had not been read by the microprocessor;

the current primitive has been put instead of the previous primitive. The previous primitive has

been lost.

Primitive Received.

PR = 1, the current primitive has been received identical twice or more.

C6 to C1

Primitive received.

DESTINATION REGISTER (DST)

First case CM = 1 (Bit of Command Register). Command Memory is selected.

PCM

DT6

DT5

DT4

DT3

DT2

DT1

DT0

After Reset 00 (H)

PCM = 1

The destination is PCM output

PCM = 0

The destination is not PCM. The destination is either Multiplex (GCI or not) or Extract

Registers.

PCM = 1

PCM

DT6

DT5

DT4

DT3

DT2

DT1

DT0

TS4

TS3

TS2

TS1

TS0

PCM = 1

The destination is PCM output

If PCM are at 2 Mb/s:

N0/1

PCM number: 0 to 3

TS0/4

Time Slot number 0 to 31.

If PCM are at 4 Mb/s

PCM at 4 Mb/s: 0 or 1

TS0/4 and N0

Time Slot number 0 to 63

(N0 = TS5)

If PCM is at 8 Mb/s

TS0/4 and N0/1

Time Slot Number: 0 to 63

N0 = TS5, N1 = TS6.

PCM = 0

The Destination is Multiplex output or Extraxtion Registers.

N1 = 0

Multiplexes are selected (GCI or not), then

N0 = 0

Multiplex number: 0

N0 = 1

Multiplex number: 1

TS0/1

Time slot Number: 0 to 31

N1 = 1

Extraction Registers are selected, then

N0 = 0 and TS0/4 = 0

A Extraction Register 40 (H) is the destination

N0 = 1 and TS0/4 = 1

B Extraction Register 41 (H) is the destination

STLC5460

25/54

STLC5460 Fiches technique(PDF) 25 Page - STMicroelectronics

STLC5460 Fiches technique(HTML) 25 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

Fiches technique Télécharger

Lien URL