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STLC5460 Fiches technique(PDF) 30 Page - STMicroelectronics |
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STLC5460 Fiches technique(HTML) 30 Page - STMicroelectronics |
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30 / 54 page ![]() RECEIVE COMMAND/INDICATE STATUS REGISTER (RCIS) 7 0 EVENT RRP OVR 0 MO G2 G1 G0 After Reset 00 (H) EVENT EVENT = 1. A primitive has been received twice identically. The number of Command/Indicate channels is give by MO, G2, G1, G0. RRP Read Receive Primitive RRP = 1 the mp has to read the primitive received in order to allow the next on to be processed. OVR OVERRUN OVR = 1. The previous primitive has not been read by the microprocessor. MO If MO = 0, Multiplex 0 if MO = 1, Multiplex 1. G 0/2 GCI 0 to GCI 7 channel of each multiplex. TEST REGISTER (TEST) 7 0 FWD WITG DCA SAV LP PRSC DCG SGV After Reset 00 (H) FWD False Word Detection FWD = 1, the counter indicates the number of wrong bytes FWD = 0, the counter indicates the number of wrong bits. WITG Word integrity. WITG = 1. The first bit of the Pseudo Random Sequence (2*11-1) is the firstbit of the channel (or subchannel) selected in the Time Slot at the beginning of the transmission. ‘ WITG = 0. The first bit of the PRS is transmitted without taking into accountthe place in the Time Slot. DCA Double channel for analyser. DCA = 1. The analyser receives Pseudo Random Sequence from two channels. DCA = 0. The analyser receives Pseudo Random Sequence from one channel. SAV Sequence Analyser Validation. When this bit goes to ”1”, the Analyser of Pseudo Random Sequence (2*11-1) is connected instead of Extract A Register i f DCA = 0, instead of Extract A and Extract B registers if DCA = 1. Then the synchronisation is researched. When SAV = 0, the analyser is initiated. NB : When DCA= 0, Insert B register can be used normally. LP Loopback. When LP = 1, the six data streams going out (PCM 0/3 and MUX 0/1) are respectively connected instead of data stream coming from the 6 inputs (PCM 0/3 and MUX 0/1). The loopback is transparent or not, depending on M0D,M1D, P0E, P1E, P2E, P3E bits of Multiplex and PCM Configuration Registers. PRSC Pseudo Random Sequence Corrupted. When this bit changes from 0 to 1, one PRS bit is corrupted if DCG = 0, two PRS bits are corrupted if DCG = 1 (one bit in each channel). After transmitting corrupted bit(s), PRSC changes from ”1” to” 0”. DCG Double channel for Generator. DCG = 1. The generator transmits Pseudo Random Sequence to two channels. DCG = 0. The generator transmits Pseudo Random Sequence to one channel. SGV Sequence Generator Validation. When this bit goes to ”1”, the generator provides Pseudo Random Binary Sequence 2 * 11-1 in accordance with CCITT Recommendation O.152. The generator is STLC5460 30/54 |
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