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STLC5460 Fiches technique(PDF) 41 Page - STMicroelectronics |
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STLC5460 Fiches technique(HTML) 41 Page - STMicroelectronics |
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41 / 54 page ![]() AUXILIARY MEMORY ACCESSES: CM=0 Write Auxiliary Memory: Receive command / indicate channels CMD and SRC registers are written if their bits have not the right value. CMD and SRC registers can be written in any order. DST register is always written the last. RCM Bits not used 00 Primitive to initiate CMD SRC DST 4or 6 6 I N AUXILIARY MEMORY 16 words assigned to 8 RX C/I channels of MUX0 & 8 RX C/I channels of MUX1 A R=0 Write CM=0 Auxiliary Memory MON TX 1 of 16 TX C/I 00 channels Read Auxiliary Memory in two steps: Receive command / indicate channels First step: register writing: CMD register is written if its bits are not the right value. SRC register is not written. DST register is always written the last. R CM bits not used 10 Register not written CMD SRC DST RCM channel status 10 channel status & Primitive which has been received MON TX 1 of 16 TX C/I 0 0 channels CMD SRC DST 6 4or 6 2 A 2 AUXILIARY MEMORY 16 words assigned to 8 RX C/I channels of MUX0 & 8 RX C/I channels of MUX1 OUT OUT MON TX 1of 16 TX C/I 00 channels Second step: register reading: CMD and SRC registers may be read in any order. DST register is not changed. STLC5460 41/54 |
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