AD9516-2SLASHPCBZ datasheet(64/84 Pages) AD

64 / 84 page

AD9516-2

Rev. 0 | Page 64 of 84

Reg.

Addr

(Hex) Bit(s) Name

Description

<7:6> R, A, B

<7>

<6>

Action

Counters

Do nothing on SYNC (default).

SYNC Pin

Asynchronous reset.

Reset

Synchronous reset.

Do nothing on SYNC.

<5:3> R Path Delay <5:3> R Path Delay (see Table 2).

<2:0> N Path Delay <2:0> N Path Delay (see Table 2).

<6>

Reference

Frequency

Sets the reference (REF1/REF2) frequency monitor’s detection threshold frequency. This does not affect

the VCO frequency monitor’s detection threshold (see Table 16, REF1, REF2, and VCO Frequency Status Monitor).

Monitor

<6> = 0; frequency valid if frequency is above the higher frequency threshold.

Threshold

<6> = 1; frequency valid if frequency is above the lower frequency threshold.

<5:0> LD Pin

Select the signal which is connected to the LD pin.

Control

<5> <4> <3>

<2>

<1> <0>

Level or

Dynamic

Signal

Signal at LD Pin

LVL

Digital lock detect (high = lock, low = unlock).

DYN

P-channel, open-drain lock detect (analog lock detect).

DYN

N-channel, open-drain lock detect (analog lock detect).

HIZ

High-Z LD pin.

CUR

Current source lock detect (110 μA when DLD is true).

LVL

Ground (dc); for all other cases of 0XXXXX not specified above.

The selections that follow are the same as REFMON.

LVL

Ground (dc).

DYN

REF1 clock (differential reference when in differential mode).

DYN

REF2 clock (N/A in differential mode).

DYN

Selected reference to PLL (differential reference when in

differential mode).

DYN

Unselected reference to PLL (not available in differential mode).

LVL

Status of selected reference (status of differential reference);

active high.

LVL

Status of unselected reference (not available in differential

mode); active high.

LVL

Status REF1 frequency (active high).

LVL

Status REF2 frequency (active high).

LVL

(Status REF1 frequency) AND (status REF2 frequency).

LVL

(DLD) AND (status of selected reference) AND (status of VCO).

LVL

Status of VCO frequency (active high).

LVL

Selected reference (low = REF1, high = REF2).

LVL

Digital lock detect (DLD); active high.

LVL

Holdover active (active high).

LVL

N/A—do not use.

LVL

VS (PLL supply).

DYN

REF1 clock (differential reference when in differential mode).

DYN

REF2 clock (not available in differential mode).

DYN

Selected reference to PLL (differential reference when in

differential mode).

DYN

Unselected reference to PLL (not available when in differential

mode).

LVL

Status of selected reference (status of differential reference);

active low.

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